1. Field of the Invention
The present invention relates to an active matrix type display provided with a thin film transistor (hereinafter, referred to as a TFT) as a switching device and more particularly to liquid crystal display (hereinafter, referred to as a LCD) which displays an image by driving liquid crystal according to the TFT.
2. Description of the Related Art
A thin film transistor array using amorphous silicon or polycrystal silicon (polysilicon) as an operational semiconductor film is used as a switching device for an active matrix type liquid crystal display panel and the like.
FIG. 6 shows a schematic structure of an array substrate for the conventional liquid crystal display panel using the TFT. FIG. 6(a) shows a plan view of the array substrate and FIG. 6(b) shows a part of a cross section cut at a line Axe2x80x94A in FIG. 6(a). As shown in FIG. 6(a), a plurality of gate wirings 4 are formed on a glass substrate 1. Further, a plurality of data wirings 6 are formed in the orthogonal direction to the gate wirings 4. The TFT is formed in a pixel area decided by the gate wirings 4 and the data wirings 6. According to a structure of the TFT shown in FIG. 6, a gate electrode is not formed by being pulled out of the gate wiring 4, and the TFT is structured to use a part of the gate wiring 4 wired lineally as the gate electrode. Furthermore, this TFT has the so-called double gate structure in which the gate wiring 4 is crossed twice.
In the pixel area, a pixel electrode 7 to be connected to the TFT is formed. Further, a storage capacitor wiring 41 is formed by crossing the pixel area in parallel with the gate wirings 4 and furthermore, a storage capacitor electrode 62 to be electrically connected to the storage capacitor wiring 41 at each pixel area is formed.
Furthermore, as shown in FIG. 6(b), a semiconductor layer 2 made of polysilicon is formed on the glass substrate 1, and a gate insulating film 3 made of silicon oxide film (SiO2) and a gate electrode (gate wiring) 4 made of chrome (Cr) are formed in this order on the semiconductor layer 2. The semiconductor layer 2 has a channel layer 2a, a source electrode 2c and a drain electrode 2b which are semiconductor layers to which impurity is doped. A first interlayer insulating film 51 is formed substantially on the whole surface of the upper layer of the gate electrode 4, and a drain electrode 2f is connected to the data wiring 6 via a contact hole 51a (refer to FIG. 6(a)). A source electrode 2e is arranged opposing to the drain electrode 2f sandwiching a channel layer 2g. The source electrode 2e functions as the drain electrode 2b in a transistor at next stage. The source electrode 2c is arranged opposing to the drain electrode 2b while sandwiching the channel layer 2a. Also, the source electrode 2c and an island-like electrode 61 are connected via a contact hole 51b. The island-like electrode 61 is formed simultaneously with a formation of the data wiring 6 made of, for example, Mo (Molybdenum). The island-like electrode 61 is connected to the pixel electrode 7 made of a transparent electrode such as ITO (Indium Tin Oxide) via a contact hole 52c in a second interlayer insulating film 52 formed above the island-like electrode 61.
On the other hand, simultaneously with the formation of the gate electrode 4, the storage capacitor wiring 41 is formed in parallel with the gate electrode 4. A storage capacitor electrode 62 is formed on the storage capacitor wiring 41 via a contact hole 51d in the first interlayer insulating film 51. The storage capacitor electrode 62 is formed simultaneously with the formation of the data wiring 6. The storage capacitor electrode 62 forms a storage capacitor Cs between the pixel electrode 7 and the storage capacitor electrode 62 sandwiching the second interlayer insulating film 52. It will be noted that, in order to maintain a constant potential, for example, the storage capacitor wiring 41 is electrically connected to a common electrode formed on the opposing substrate side arranged to face the glass substrate 1. Liquid crystal is sealed between the array substrate where the pixel is formed on the glass substrate and the opposing substrate. When the TFT writes electric charges in a liquid crystal capacitor via the pixel electrode 7 to display an image, the TFT simultaneously writes the electric charges in the storage capacitor. In general, the capacitance which is substantially from the same as the capacitance of liquid crystal to several times as much as the capacitance of liquid crystal is required for the storage capacitor.
FIG. 7 shows other structure of the array substrate for the conventional liquid crystal display panel using the TFT. FIG. 7(a) shows a plan view of the array substrate and FIG. 7(b) shows a part of a cross section cut at a line Bxe2x80x94B in FIG. 7(a). As shown in FIG. 7(a), a plurality of gate wirings 4 are formed on the glass substrate 1. Further, a plurality of data wirings 6 are formed in the orthogonal direction to the gate wirings 4. The TFT is formed in the pixel area decided by the gate wirings 4 and the data wirings 6. According to the structure of the TFT shown in FIG. 7, a gate electrode is not formed by being pulled out of the gate wiring 4, and the structure of the TFT is structured to use a part of the gate wiring 4 wired lineally as the gate electrode. Furthermore, this TFT has the so-called double gate structure in which the gate wiring 4 is crossed twice.
In the pixel area, the pixel electrode 7 to be connected to the TFT is formed. Further, a storage capacitor electrode 8 is formed surrounding the circumference of the pixel electrode 7. This storage capacitor electrode 8 also serves as a black matrix layer (black matrix) normally formed on the opposing substrate side facing the array substrate where the TFT is formed sandwiching a liquid crystal layer.
Furthermore, as shown in FIG. 7(b), the semiconductor layer 2 made of polysilicon is formed on the glass substrate 1, and the gate insulating film 3 made of silicon oxide film and the gate electrode (gate wiring) 4 made of Cr are formed on the semiconductor layer 2. The semiconductor layer 2 has a channel layer 2a, and a source electrode 2c and a drain electrode 2b which are semiconductor layers to which impurity is doped. The first interlayer insulating film 51 is formed substantially on the whole surface of the upper layer of the gate electrode 4, and a drain electrode 2f is connected to the data wiring 6 via a contact hole 51a (refer to FIG. 7(a)). A source electrode 2e is arranged opposing to the drain electrode 2f sandwiching a channel layer 2g. The source electrode 2e functions as a drain electrode 2b in a transistor at next stage. The source electrode 2c is arranged opposing to the drain electrode 2b sandwiching the channel layer 2a. Also, the source electrode 2c and the island-like electrode 61 are connected via the contact hole 51b. The island-like electrode 61 is made of, for example, Mo and formed simultaneously with the formation of the data wiring 6. The island-like electrode 61 is connected to the pixel electrode 7 made of a transparent electrode such as ITO via a contact hole 53c opened in the second interlayer insulating film 52 and a third interlayer insulating film 53 formed above the island-like electrode 61.
The storage capacitor electrode 8 made of, for example, titanium is formed between the second interlayer insulating film 52 and the third interlayer insulating film 53. The storage capacitor electrode 8 which also serves as the black matrix layer forms a storage capacitor Cs between the pixel electrode 7 and the storage capacitor electrode 8 sandwiching the third interlayer insulating film 53. Further, the storage capacitor electrode 8 is connected to, for example, the common electrode in order to maintain the constant potential.
In order to increase storage capacity in the display described above, methods such as increasing a relative dielectric constant of an insulating film between electrodes, decreasing the thickness of the insulating film, or increasing the area of a storage capacitor electrode are generally considered. However, there is problems that in the method of increasing the relative dielectric constant of the insulating film, a material for the insulating film is limited, and in the method of decreasing the thickness of the insulating film, an occurrence of an interlayer short-circuit between electrodes is concerned.
Further, though the display is desired to display as high as possible in brightness, in the method of increasing an electrode area, the area of the storage capacitor electrode formed by a metal material which does not pass the light extends inside the pixel electrode 7 and much of transmitting light from the back lighting is shielded at the storage capacitor electrode. Therefore, when obtaining a bright display panel with high aperture ratio by increasing the area on which the back lighting light is incident, a problem exists where the storage capacitor can not be increased.
An object of the present invention is to provide an active matrix type display from which a large storage capacity can be obtained without thinning an insulating layer between electrodes nor expanding the electrode to a pixel area.
Above object is achieved by an active matrix type display comprising a plurality of gate wirings formed on a substrate, a plurality of data wirings formed on the substrate substantially orthogonal to the gate wirings, a thin film transistor formed in a plurality of pixel areas decided by the gate wirings and the data wirings and arranged in a matrix shape, a pixel electrode formed in the pixel area and connected to the thin film transistor, and a plurality of storage capacitor electrodes forming a plurality of storage capacitors between the substrate, the pixel electrode and the storage capacitor electrodes via a plurality of insulating films.
According to the present invention, by laminating storage capacitors to structure a plurality of layers, capacity can be increased without generating an increase of a shielding area which reduces the aperture ratio of the pixel.
Further, in addition to the conventional storage capacitor, by laminating storage capacitors to a plurality of layered structures in the area where a conventional storage capacitor electrode originally shields a light, storage capacity can be increased without reducing the aperture ratio of the pixel. It will be noted that, the active matrix type display according to the present invention uses the same device forming materials as in the conventional display and can be fabricated by the same fabrication method as before.